What does '2nm' actually mean? TSMC N2 and nanosheet transistors, explained

TechTech

What does '2nm' actually mean? TSMC N2 and nanosheet transistors, explained

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2nm chips aren't 2 nanometres of anything. Here's what TSMC's N2 really changes, why nanosheet (gate-all-around) transistors matter, and what's next.

In this article
  1. The name is a label, not a ruler
  2. What TSMC's N2 actually is
  3. Why nanosheets matter
  4. What comes after N2
  5. Why you should care

Phones, laptops and AI chips are all racing to "2nm." So what is 2 nanometres long? Honestly, nothing in particular. Here's what the name means and what actually changes.

The name is a label, not a ruler

Chip "nodes" used to be named after a real dimension, like the transistor's gate length. That stopped matching reality long ago.

IEEE Spectrum explained in 2020 that most critical features of a "7-nm" transistor are considerably larger than 7nm, and that the gap between name and physical reality had existed for about two decades. It gave an example: Intel's 22nm FinFETs in 2011 had 26nm gate lengths and a 40nm half-pitch. The article ran in print as "The Node is Nonsense."

So read "2nm" as "the generation after 3nm." It still means real progress, just not a literal size.

What TSMC's N2 actually is

From TSMC's 2nm page:

  • N2 started volume production in 4Q25, as planned.
  • It's TSMC's first-generation nanosheet transistor technology.

When TSMC first showed N2 in 2022, it promised versus N3:

  • 10–15% faster at the same power, or
  • 25–30% less power at the same speed.

That's an "or." Chip designers pick where on that trade-off they want to land.

Why nanosheets matter

A transistor is a switch. A gate turns current on and off through a channel.

  • Planar (old): the gate sat on top of a flat channel.
  • FinFET (roughly the last decade, through TSMC's 3nm): the channel is a raised fin, with the gate wrapped around three sides.
  • Nanosheet / gate-all-around (N2): the channel is a stack of thin, flat sheets, with the gate wrapped around all sides.

More gate contact means better control and less leakage at small sizes. That's how you get more speed or less power without a "real" 2nm feature anywhere.

What comes after N2

TSMC's roadmap page lists:

  • A16: nanosheet transistors plus a backside power rail, moving power wiring to the back of the chip to improve logic density and performance.
  • A14: the next full node.
  • A12: TSMC's second-generation backside power solution.

The "A" stands for angstroms (a tenth of a nanometre), which is just the naming running out of nanometres.

Why you should care

New nodes cost a lot to make, and AI chips want the best ones. That's part of why foundry earnings get so much attention; see our TSMC, Lam and TI earnings recap. Faster chips also need faster memory, which is its own bottleneck: see GDDR7 vs GDDR6 vs HBM and TPU vs GPU.

FAQ

Is a 2nm chip actually 2 nanometres?

No. IEEE Spectrum reported in 2020 that most critical features of a '7nm' transistor are considerably larger than 7nm, and that the naming has been disconnected from physical size for about two decades.

What is a nanosheet transistor?

A design where the gate surrounds stacked, flat silicon channels on all sides (often called gate-all-around). It gives the gate better control of current than the fin-shaped FinFET design used through 3nm.

When did TSMC start making 2nm chips?

TSMC says N2 started volume production in 4Q25 as planned.

What is backside power delivery?

Moving the wires that carry power to the back of the chip, freeing the front for signal wiring. TSMC says A16 combines nanosheet transistors with a backside power rail to improve logic density and performance.

Sources

  1. TSMC, 2nm Technology (logic technology page)https://www.tsmc.com/english/dedicatedfoundry/technology/logic/l_2nm
  2. TSMC, “TSMC FINFLEX, N2 Process Innovations Debut at 2022 North American Technology Symposium” (Jun 16, 2022)https://pr.tsmc.com/english/news/2939
  3. IEEE Spectrum, “A Better Way to Measure Progress in Semiconductors” (Jul 21, 2020)https://spectrum.ieee.org/a-better-way-to-measure-progress-in-semiconductors

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